Glossary

Rake's language and compiler terms. The vectors cheat sheet explains CPU SIMD and GPU terms, with examples of lane and memory operations.

Rake's terms

TermMeaning
rackone parallel value of the target profile, such as an f32s: one physical CPU vector register or WebAssembly v128. The GPU design maps it across a specified warp or subgroup
laneone element position in a rack: an f32s on AVX2 has eight
uniformone scalar shared by every lane, marked <name>
tinea labelled lane mask, local to a rake or defined globally as a typed predicate such as #valid(values)
gapsthe exact Boolean complement of a tine or composed mask, including lanes with NaNs that failed its comparisons
through blockcode that computes under a mask, with an optional else value for other lanes. Without else, only selected lanes are defined
sweepthe choice of each lane's result in priority order, with masks that provably cover every lane or a final _
scratcha function of racks with no tines, through blocks or sweep
rakea function of racks with tines, through blocks and a sweep
runvector code over memory: traverse stacks and apply rakes or scratches to racks from their columns
slow codescalar code, marked slow, that holds no racks
slow blockslow { ... }, a lexical scalar escape inside a run or slow function, optionally producing a scalar value
fused binding| name <| e, one stage of a pure fused computation
packone record described by a pack declaration, with its fields stored together
stacka count of packs transposed into one contiguous column for each field
stack runa run that applies calculations to whole stacks and returns one: s with { field: e }
maskingwhere p: a stack run replaces fields only in the records selected by p
compactioncompact s where p: a stack run keeps only the records selected by p
movepassing a stack to the run that returns it, which updates its columns in place
view[]T, elements with a count, borrowed from the caller
profilea named target, such as x86-avx2, that fixes the rack width and the rules
wideningconverting narrow stored elements, such as u8, to wider lanes without changing their values

Compiler terms

TermMeaning
front end, back endthe front end parses and checks source, and the back end selects instructions, assigns registers and writes the program
SSAstatic single assignment: a representation in which each value is defined once, which makes data dependencies explicit
declaration, definitiona declaration introduces a name and may give its type. A definition supplies the name's value or behaviour. A language construct can do both
binding, referencea binding associates a name with a value or other program entity, and a reference uses that name within its scope. Rake's immutable value bindings don't designate memory locations
fusioncombining separate pieces of work so they can execute together, such as merging loops into one pass or forming a fused multiply-add. Rake uses fused bindings for stages of pure vector calculations
instruction selectionchoosing the machine instructions for each operation
register allocationassigning each value to a physical register. Rake does this on its physical CPU targets. WebAssembly runtimes and the proposed NVIDIA toolchain own it on their virtual targets
object codeencoded machine instructions and data, ready for a linker
assemblerthe tool that encodes textual assembly as object code
LLVMa compiler infrastructure with optimisation, instruction selection and register allocation for multiple targets
ABIapplication binary interface: the rules for passing arguments, returning values and laying out data
System V ABIthe calling convention of most Unix-like x86-64 systems
AAPCS64the procedure call standard for 64-bit Arm
OCaml, Dune, Nixthe compiler's implementation language, its build system, and the package manager that pins the tools in nix develop