Rake
Documentation
These pages describe Rake 0.7.0. The language pages define each form, starting from the syntax reference. Every Rake program in them is compiled by the documentation checks, and most also run with their stated result. Proposed GPU profiles are designs, with no implementation yet.
Language
- Syntax reference
- Rake's syntax: layout, identifiers, literals, types, statements and expressions, with the marks for uniforms, tines and fused stages explained.
- Primitives, operations, and targets
- What each Rake profile compiles: float and integer racks, bit operations, shuffles, floating-point rules, relaxed SIMD, calling conventions and checks.
- Tines, through and sweeps
- How a Rake rake chooses values lane by lane without branches: tines define masks, through blocks compute under them, and a sweep chooses each result.
- Fused bindings
- Rake's fused bindings: stages of one pure computation that the compiler may rewrite as a whole, how fused multiply-adds form, and what fma guarantees.
- Control flow
- Conditional expressions by mask or uniform, fixed-count repeat loops, counted loops and branches in runs, and the control flow of Rake's slow code.
- Reductions and scans
- Rake's float and integer reductions and inclusive scans: lane order, wrapping arithmetic, strict minimum and maximum, and supported SIMD profiles.
- Packs, stacks and runs
- Define one record as a pack, collect its fields into a stack of columns, then traverse target-sized racks with a run. Includes tails and the C ABI.
- Memory operations
- How Rake runs read and write memory: checked and unchecked accesses, masks, the WebAssembly gather, and designs for scatter, compression and expansion.
- The slow tier
- Rake's slow tier: scalar programs, records, state, embedded data and calls to C, with explicit boundaries between scalar work and vector kernels.
Learning
- Playground and tutorial
- An interactive Rake tutorial in twelve lessons, with each concept demonstrated in the result, lane trace, compiler output or diagnostic message.
- Vectors cheat sheet
- CPU and GPU vector terminology explained with diagrams: lanes, masks, gather, shuffle, splat, reductions, warps, memory access and execution costs.
- Glossary
- Rake's language and compiler terms explained: racks, packs, stacks, uniforms, tines, sweeps, bindings, SSA, register allocation and calling conventions.
Compiler
- The rakec command
- The rakec command line: its modes for checking, interpreting, emitting and verifying Rake programs, its options, its environment and its diagnostics.
- The compiler backend
- How rakec lowers native CPU and WebAssembly code, checks objects and separates its planned GPU lane mapping from NVIDIA's physical allocation.
- Testing the compiler
- How the Rake compiler is tested: the fixture manifest, the interpreter and WebAssembly differential, the C boundary tests and the checked documentation.
Project
- Language goals
- Rake's language goals and compiler checks for vector racks, marked scalars, lane masks, pure fused regions, explicit layouts and GPU execution.
- Compiler roadmap
- Rake's roadmap for native and WebAssembly coverage, language syntax, editor tooling, package releases and the release checks for each feature.
- Changelog
- What changed in each Rake release, starting with 0.4.0-beta: integer racks, runs and whole programs on WebAssembly, and checked documentation examples.
- Rake and other languages
- Rake, ISPC and Bend 2 compared: SIMD lanes, GPU warps and parallel tasks, their lowering contracts, and the performance that needs measurement.
- GPU profiles (design)
- Rake's proposed GPU contract: warp lanes, explicit costs, PTX to verified cubin, exact artifact loading, and what still needs device measurement.