Rake and other languages

Rake's closest established relative is Intel's ISPC, because both let a programmer express parallel lanes directly, whereas Bend 2 expresses parallel tasks.

Ways to write SIMD code

The compiler repository's demo/soa-proof harness writes output_x[i] = position_x[i] + velocity_x[i] * dt over 400 particles in Rake, strict C and Rust, and then takes the sine of every lane. None of the builds has a vector sine, so under the harness's strict flags the C and Rust builds call the scalar sinf once per value, while the Rake build stops with call to 'sin' is not supported by native scratch lowering.

Rake and ISPC

ISPC is a C-like language for writing one program across a group of CPU vector lanes. Like Rake, its source describes a group of lanes instead of leaving an optimiser to find SIMD in a scalar loop, and the target chooses the lane count. Both languages separate values shared by the group from values owned by lanes, run divergent paths under an execution mask, give columnar layouts their own syntax and types, and aim at CPUs and GPUs.

The same update of every particle in a structure of arrays, in ISPC:

export void advance_x(
    uniform float position_x[],
    uniform float velocity_x[],
    uniform float output_x[],
    uniform int count,
    uniform float dt) {
  foreach (i = 0 ... count)
    output_x[i] = position_x[i]
                + velocity_x[i] * dt;
}

and in Rake:

pack Particles {
  f32: position_x, velocity_x;
}

run advance_x(particles: stack Particles, <dt: f32>) -> stack Particles:
  particles with { position_x: particles.position_x + particles.velocity_x * <dt> }

ISPC keeps the familiar imperative loop, index, assignment and pointers, and values in the gang vary by lane unless marked uniform. Rake's version is a pure expression with no loop or index. A run applies it to whole columns of a stack, the compiler splits them into racks, and the shared values are the ones marked, with angle brackets.

ISPC's performance guide and its Xe guide explain the cost of irregular accesses that become gathers, scatters or serialised loads, and of register pressure that causes spills. A Rake profile turns those costs into rules, and rejects a program that breaks one with a diagnostic that identifies the operation. The ISPC guide describes the language.

GPU execution: Rake, ISPC and Bend

On an NVIDIA GPU, a warp groups 32 threads that each hold one lane's values and execute each operation together, although divergent paths can leave some lanes inactive. The hardware schedules warps, while the program decides the work on their lanes, as NVIDIA's SIMT description explains.

Bend 2 asks the programmer for independent calls that take roughly the same time. A binary fork–join scheduler distributes that work once, and a ! after a call sends it and its nested calls to the GPU. This comparison uses the Bend 2 guide at revision 75cc360, and the ISPC guides at documentation revision c22f07f.

Other languages for parallel kernels